Center of Excellence for VLSI Design

About Center of Excellence for VLSI Design

The Center of Excellence for VLSI Design was established in the academic year 2024 25 to focus on hardware and software advancements in the field of VLSI Design.. This CoE got approval for ChipIN access an initiative of Ministry of Electronics and Information Technology (MeitY), Govt. of India, through CDAC, Bengaluru. The Center of Excellence for VLSI Design is a dynamic and essential space for innovation in integrated circuit design. The CoE provides students with hands-on experience in designing, implementing, and testing integrated circuits. It helps them understand the practical aspects of VLSI design, from basic concepts to complex chip architectures. The CoE is often used for cutting edge research in semiconductor technology. Researchers explore new design methodologies, circuit architectures, and fabrication techniques. The Center of Excellence for VLSI Design is often utilized for student projects that involve the design, simulation, and implementation of integrated circuits. These projects allow students to apply theoretical knowledge to practical problems.

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Key Highlights:

Objectives

Skill Development: To train the students in VLSI design tools, methodologies, and fabrication processes towards promising career opportunities in semiconductor industry.

Industry Collaboration: To partner with semiconductor companies in state-of-art technologies and facilitate the students for Internship / Mini / Major Project execution.

Research and Innovation: To advance cutting-edge research in VLSI design and related domains to promote innovation

MoUs

S.No.	Name of the industry	Impact
1.	Synopsys	Training in the field of VLSI Design Providing Internships and job opportunities to the students in VLSI Design
2.	Maven Silicon Softech Private Limited, Bangalore, India	Training in the field of VLSI Design Providing Internships to the students in VLSI Design

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Faculty Members

S.No	Name of the faculty	Designation	Role/Domain
1	Dr. K. Ragini,	Professor	HoD,ECE,Principle Investigator chipIn
2	Mr.G. Krishna Kishore	Assistant Professor	Co-PI, chip In, VLSI Design
3	Mr. V. Radha Krishna	Assistant Professor	VLSI Design
4	Mr. B. Sreekanth Reddy	Assistant Professor	VLSI Design & Internet Of Things
5	Mr.V.Shankar	Assistant Professor	Low Power VLSI Design and Analog &Mixed signal Design.
6	Mrs.P.Roopa Ranjani	Assistant Professor	Implantable Medical Devices

Infrastructure

Tool Name	Version/License Type	Number of Users	Validity/Notes
Synopsys Tool	–	60 Users	–
Xilinx Vivado System Edition	2018.1	–	–
Mentor Graphics	–	50 Users	Valid up to 2024

Outcomes

S.No	Title of the Paper	Name of the Conference/Journal	Conference Dates	Status of the paper(Submitted/Accepted/Published)
	A Novel Energy-efficient Approach for RT-free TSPC Dual Edge-Triggering Flip-Flops using STC	5th international conference on innovative research in renewable energy technologies(IRRET-2025)	23-03-25	Accepted
	Development of Compact, Low-Power Toggle Flip-Flops for High-Speed Applications	5th international conference on innovative research in renewable energy technologies(IRRET-2025)	23-03-25	Accepted
	Design and Analysis of an Energy-Efficient Voltage Level Shifter for Low-Power Applications	5th international conference on innovative research in renewable energy technologies(IRRET-2025)	23-03-25	Accepted
	Designing 18T Hybrid Topological Flipflop for low power application	AIP conference	13-12-2024	Accepted
	Design of sense amplifier low power flipflop using conditional bridging	AIP conference	13-12-2024	Accepted

Contact

Lab Information – D-205
Incharge	G. KRISHNA KISHORE, Asst Professor
Collaboration Industry	Ministry of Electronics & Information Technology (MeitY) Chip to Startup (C2S)
Email	[email protected]